Datasheet

Section 20 Serial Communication Interface 3 (SCI3, IrDA)
Page 722 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
20.6.3 High-Level Pulse Width Selection
Table 20.7 shows possible settings for bits IrCK2 to IrCK0 (minimum pulse width), and this LSI's
operating frequencies and bit rates, for making the pulse width shorter than 3/16 times the bit rate
in transmission.
Table 20.7 Settings of Bits IrCK2 to IrCK0
Bit Rate (bps) (Above)/Bit Period × 3/16 (Below)
2400 9600 19200 38400 57600 115200
Operating
Frequency φ
(MHz) 78.13 19.53 9.77 4.88 3.26 1.63
4.9152 011 011 011 011 011 011
5 011 011 011 011 011 011
6 100 100 100 100 100 100
6.144 100 100 100 100 100 100
7.3728 100 100 100 100 100 100
8 100 100 100 100 100 100
9.3804 100 100 100 100 100 100
10 100 100 100 100 100 100
12 101 101 101 101 101 101
12.288 101 101 101 101 101 101
14 101 101 101 101 101 101
14.7456 101 101 101 101 101 101
16 101 101 101 101 101 101
16.9344 101 101 101 101 101 101
17.2032 101 101 101 101 101 101
18 101 101 101 101 101 101
19.6608 101 101 101 101 101 101
20 101 101 101 101 101 101