Datasheet

Section 20 Serial Communication Interface 3 (SCI3, IrDA)
Page 696 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
20.2.10 IrDA Control Register (IrCR)
Address:
Bit:
Value after reset:
b7
IrE
0
b6
0
b5
IrCK[2:0]
0
b4
0
b3
IrTXINV
0
b2
IrRXINV
0
b1
⎯
1
b0
⎯
1
H'FF05DE
Bit Symbol Bit Name Description R/W
7 IrE IrDA enable 0: The TXD_2/IrTXD and RXD_2/IrRXD pins
function as the TXD_2 and RXD_2 pins.
1: The TXD_2/IrTXD and RXD_2/IrRXD pins
function as the IrTXD and IrRXD pins.
R/W
6 to 4 IrCK[2:0] IrDA clock select
2 to 0
000: Bit rate × 3/16
001: φ/2
010: φ/4
011: φ/8
100: φ/16
101: φ/32
110: φ/64
111: φ/128
R/W
3 IrTXINV IrTX data polarity
inversion
0: Transmit data is output from IrTXD as is.
1: Transmit data is inverted to be output from
IrTXD.
R/W
2 IrRXINV IrRX data polarity
inversion
0: IrRXD input is used for receive data as is.
1: IrRXD input is inverted to be used for receive
data.
R/W
1, 0 ⎯ Reserved These bits are read as 1. The write value should
be 1.
⎯
Note: The IrCR value is retained in (module) standby mode.