Datasheet

Section 19 Watchdog Timer (WDT)
Page 670 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
19.2.4 Timer Interrupt Control Register WD (TICRWD)
Address:
Bit:
Value after reset:
b7
1
b6
1
b5
IWIE
0
b4
⎯
1
b3
⎯
1
b2
⎯
1
b1
⎯
1
b0
⎯
1
H'FFFF9B
INTSEL[1:0]
Bit Symbol Bit Name Description R/W
7, 6 INTSEL[1:0] WDT periodic
interrupt
condition
select
00: Setting prohibited
01: An interrupt is generated when the upper two bits
in TCWD is B'01.
10: An interrupt is generated when the upper two bits
in TCWD is B'10.
11: An interrupt is generated when the upper two bits
in TCWD is B'11. (Initial value)
R/W
5 IWIE WDT periodic
interrupt
enable
0: Periodic interrupt request is disabled.
1: Periodic interrupt request is enabled.
R/W
4 to 0 ⎯ Reserved These bits are read as 1. The write value should
always be 1.
⎯