Datasheet

Section 18 Timer RG
REJ09B0465-0300 Rev. 3.00 Page 661 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
(1) When GR is an output compare register
When a compare match occurs, the value in the buffer register for the corresponding channel is
transferred to the general register. This operation is illustrated in figure 18.18.
Buffer register
General
register
TRGCNTComparator
Compare match signal
Figure 18.18 Compare Match Buffer Operation
(2) When GR is an input capture register
When input capture occurs, the value in TRGCNT is transferred to GR and the value previously
held in the general register is transferred to the buffer register. This operation is illustrated in
figure 18.19.
Buffer register
General
register
TRGCNT
Input capture
signal
Figure 18.19 Input Capture Buffer Operation