Datasheet

Section 18 Timer RG
REJ09B0465-0300 Rev. 3.00 Page 651 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
(1) Example of PWM Mode Setting Procedure
Figure 18.9 shows an example of the PWM mode setting procedure.
Select counter clock
PWM mode
Select counter clearing source
Set GRA
<PWM mode>
[1]
[2]
[3]
Set GRB [4]
Set PWM mode [5]
[6]
[7]
Start counting [8]
[1] Select the counter clock with bits TPSC2 to
TPSC0 in TRGCR. When an external clock is
selected, select the external clock edge with bits
CKEG1 and CKEG0 in TRGCR.
[2] Use bits CCLR1 and CCLR0 in TRGCR to
select the counter clearing source.
[3] Set the 1-output timing for the output PWM
waveform with GRA.
[4] Set the 0-output timing for the output PWM
waveform with GRB.
[5] Select the PWM mode with the PWM bit in
TRGMDR. When PWM mode is set, GRA and
GRB are used as output compare registers for
setting 1-output/0-output for PWM output
waveform, regardless of the TRGIOR setting.
[6] Write the same value output initially from the
PWM output pin (TGIOA) to the PDR bit of the
corresponding pin specified by the PMC.
[7] When the PMR bit of the corresponding pin
specified by the PMC is set to 1, the TGIOA pin
functions as the PWM output pin.
[8] Set the STR bit in TRGMDR to 1 to start the
count operation.
Set PDR
Set PMR to 1
Figure 18.9 Example of PWM Mode Setting Procedure