Datasheet

Section 18 Timer RG
REJ09B0465-0300 Rev. 3.00 Page 629 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
Section 18 Timer RG
Timer RG is a 16-bit timer with output compare and input capture functions. Timer RG can count
using a number of internal or external clocks and output pulses with a desired duty cycle using the
compare match function between the timer counter and two general registers. Timer RG is also
able to decode the phase difference between two external clocks and increment. Timer RG
therefore provides an ideal solution for many systems with a requirement to decide position based
on a rotary encoder or tachometer as well as a wide range of other applications.
18.1 Features
• Selection of six counter clock sources
Internal clocks: φ, φ/2, φ/4, φ/8, and φ/32
External clocks: TCLKA, TCLKB
• Timer mode
Waveform output by compare match (Selection of 0 output, 1 output, or toggle output)
Input capture function (Rising edge, falling edge, or both edges)
• PWM mode
Generates pulses with a desired period and duty cycle.
• Phase counting mode
Detects phase difference between two external clock inputs and increments/decrements the
TCNT.
• Fast access via internal 16-bit bus
Performs high-speed accesses to the timer counter and general registers using the 16-bit bus
interface.
• Four interrupt sources
TRGCNT overflow, TRGCNT underflow, compare match, and input capture