Datasheet

Section 16 Timer RD
REJ09B0465-0300 Rev. 3.00 Page 595 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
(2) IMF Flag Set Timing at Input Capture
When an input capture signal is generated, the IMF flag is set to 1 and the value of TRDCNT is
simultaneously transferred to corresponding GR. Figure 16.63 shows the timing.
φ
Input capture
signal
IMF
TRDCNT
N
GR N
Figure 16.63 IMF Flag Set Timing at Input Capture
(3) Overflow Flag (OVF) Set Timing
The overflow flag is set to 1 when the TRDCNT overflows. Figure 16.64 shows the timing.
φ
Overflow signal
OVF
TRDCNT H'0000H'FFFF
Figure 16.64 OVF Flag Set Timing