Datasheet

Section 16 Timer RD
Page 528 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
Bit Symbol Bit Name Description R/W
2 IOC2 I/O control C2 Selects the GRC function.
0: GRC functions as an output compare register
1: GRC functions as an input capture register
R/W
1, 0 IOC[1:0] I/O control C1
and C0
When IOC3 = 0,
00: No output at compare match
01: 0 output to the FTIOA pin at GRC compare
match
10: 1 output to the FTIOA pin at GRC compare
match
11: Output toggles to the FTIOA pin at GRC compare
match
When IOC3 = 1 and IOC2 = 0,
00: No output at compare match
01: 0 output to the FTIOC pin at GRC compare
match
10: 1 output to the FTIOC pin at GRC compare
match
11: Output toggles to the FTIOC pin at GRC
compare match
When IOC3 = 1 and IOC2 = 1,
00: Input capture to GRC at rising edge at the FTIOC
pin
01: Input capture to GRC at falling edge at the
FTIOC pin
1X: Input capture to GRC at rising and falling edges
at the FTIOC pin
R/W
[Legend]
X: Don't care.
Notes: 1. When a GR register functions as a buffer register for a paired GR register, the settings
in the IOA2 and IOB2 bits in TRDIORA and the IOC2 and IOD2 bits in TRDIORC of
both registers should be the same.
2. In PWM mode, PWM3 mode, complementary PWM mode, and reset synchronous
PWM mode, the settings of TRDIORC are invalid.
TRDIORC selects whether GRC or GRD is used as an output compare register or an input capture
register. When an output compare register is selected, the output setting is selected. When an input
capture register is selected, an input edge of an input capture signal is selected. TRDIORC also
selects the function of the FTIOA to FTIOD pins.