Datasheet

Section 16 Timer RD
REJ09B0465-0300 Rev. 3.00 Page 525 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
16.2.12 Timer RD I/O Control Registers (TRDIORA and TRDIORC)
Address:
Bit:
Value after reset:
Address:
Bit:
Value after reset:
b7
⎯
1
b6
IOB2
0
b5
0
b4
0
b3
⎯
1
b2
IOA2
0
b1
0
b0
0
H'FFFFC5, H'FFFFCC
IOB[1:0] IOA[1:0]
TRDIORA
b7
IOD3
1
b6
IOD2
0
b5
0
b4
0
b3
IOC3
1
b2
IOC2
0
b1
0
b0
0
H'FFFFD6, H'FFFFCD
IOD[1:0] IOC[1:0]
TRDIORC
• TRDIORA
Bit Symbol Bit Name Description R/W
7 ⎯ Reserved This bit is read as 1. The write value should be 1. ⎯
6 IOB2 I/O control B2 Selects the GRB function.
0: GRB functions as an output compare register
1: GRB functions as an input capture register
R/W
5, 4 IOB[1:0] I/O control B1
and B0
When IOB2 = 0,
00: No output at compare match
01: 0 output to the FTIOB pin at GRB compare
match
10: 1 output to the FTIOB pin at GRB compare
match
11: Output toggles to the FTIOB pin at GRB compare
match
When IOB2 = 1,
00: Input capture to GRB at rising edge at the FTIOB
pin
01: Input capture to GRB at falling edge at the FTIOB
pin
1X: Input capture to GRB at rising and falling edges
at the FTIOB pin
R/W