Datasheet

Section 2 CPU
REJ09B0465-0300 Rev. 3.00 Page 25 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
H'00000000
H'00000003
H'00000004
Exception vector table
Reserved
Reset exception vector
(Reserved for system use)
Reserved
Exception vector 1
Reserved
(Reserved for system use)
H'00000014
H'00000008
H'00000007
Figure 2.1 Exception Vector Table (Advanced Mode)
The memory indirect addressing mode (@@aa:8) employed in the JMP and JSR instructions
uses an 8-bit absolute address included in the instruction code to specify a memory operand
that contains a branch address. In advanced mode, the operand is a 32-bit longword operand,
providing a 32-bit branch address. The upper 8 bits of these 32 bits are a reserved area that is
regarded as H'00. Branch addresses can be stored in the area from H'00000000 to H'000000FF.
Note that the top area of this range is also used for the exception vector table.