Datasheet

Section 15 Timer RC
Page 480 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
The following is an example of operation when TRCCNT starts counting by the TRGC input and
the one-shot pulse waveform is output in PWM2 mode. When the falling edge of the TRGC input
is selected by TRCCR2 (setting the TCEG1 bit to 1 and clearing the TCEG0 bit to 0), TRCCNT is
set to counting-up on compare match A with GRA (setting the CSTP bit in TRCCR2 to 1),
TRCCNT is cleared on compare match A (setting the CCRL bit in TRCCR1 to 1), and the initial
value of the output signal is set to 0 by TRCCR1 (clearing the TOB bit to 0), TRCCNT starts
counting at the falling edge of FTIOA/TRGC after the CTS bit in TRCMR has been set to 1. Then,
TRCCNT is cleared to H'0000 on a compare match with GRA and stops counting, and the one-
shot pulse waveform is output. Figure 15.21 shows such an example.
The value of TRCCNT
H'FFFF
H'0000
GRA
GRB
GRC
CTS
FTIOA/TRGC
High
FTIOB
Time
Figure 15.21 Example (2) of Output Operation of One-Shot Pulse Waveform
in PWM2 Mode