Datasheet

Section 15 Timer RC
REJ09B0465-0300 Rev. 3.00 Page 457 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
15.2.8 Timer RC Output Enable Register (TRCOER)
b7
PTO
0
b6
⎯
1
b5
⎯
1
b4
⎯
1
b3
ED
1
b2
EC
1
b1
EB
1
b0
EA
1
H'FFFF92
Bit:
Address:
Value after reset:
Bit Symbol Bit Name Description R/W
7 PTO Timer output
disabled mode
0: The ED, EC, EB and EA bits are not set to 1 by
the low level input of the TRCOI signal.
1: The ED, EC, EB and EA bits are set to 1 by the
low level input of the TRCOI signal.
R/W
6 to 4 ⎯ Reserved These bits are read as 1. The write value should
be 1.
⎯
3 ED Master enable D 0: The FTIOD output is enabled according to the
TRCMR and TRCIOR1 settings
1: The FTIOD output is disabled regardless of the
TRCMR and TRCIOR1 settings.
R/W
2 EC Master enable C 0: The FTIOC output is enabled according to the
TRCMR and TRCIOR1 settings.
1: The FTIOC output is disabled regardless of the
TRCMR and TRCIOR1 settings.
R/W
1 EB Master enable B 0: The FTIOB output is enabled according to the
TRCMR and TRCIOR0 settings
1: The FTIOB output is disabled regardless of the
TRCMR and TRCIOR0 settings.
R/W
0 EA Master enable A 0: The FTIOA output is enabled according to the
TRCIOR0 settings
1: The FTIOA output is disabled regardless of the
TRCIOR0 settings.
R/W
TRCOER enables or disables the timer outputs. When setting the PTO bit to 1 and driving the
TRCOI signal low, the ED, EC, EB and EA bits are set to 1 and timer RC outputs are disabled.