Datasheet

Section 13 Timer RA
REJ09B0465-0300 Rev. 3.00 Page 413 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
13.3.4 Event Counter Mode
This mode counts external events that are input from the TRAIO pin as a count source. Setting the
TMOD[2:0] bits in TRAMR to B'010 activates the event-counter mode operation. By setting the
TEDGSEL bit in TRAIOC, it is possible to specify whether counting is to be performed on the
rising or falling edge of an input event from the TRAIO pin. Also, by setting the TIOGT[1:0] bits
in TRAIOC, a function enables external event input when the IRQ2 pin is at a high level. Setting
the TIPF[1:0] bits in TRAIOC allows applying a filter to external event input. Similar to the pulse
output operation mode, a toggle can be output from the TRAO pin in synchronization with an
underflow of the timer counter. In event counter mode, even if 1 is written to the TSTART bit, the
value of the TCSTF bit will not become 1 unless the corresponding event signal is input. If the
event signal is input while TCSTF = 0, the counter value will be the number of times the event has
occurred minus 3. If the event signal is input while TCSTF=1, the number time the event has
occurred = counter value.
13.3.5 Pulse Width Measurement Mode
This mode measures the pulse width of external signals that are input from the TRAIO pin. Setting
the TMOD[2:0] bits in TRAMR to B'011 activates the pulse width measurement mode operation.
A count source is selected in terms of the TCK[2:0] bits in TRAMR. The TEDGSEL bit in
TRAIOC can be used to specify whether the low-level width or the high-level width of input
pulses is to be measured. Setting the TIPF[1:0] bits in TRAIOC allows applying a filter to external
pulse input. Figure 13.3 shows an operation example of pulse width measurement mode.