Datasheet

Section 11 Data Transfer Controller (DTC)
Page 346 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
11.3 Activation Sources
The DTC operates when activated by an interrupt request or by a write to DTVECR by software.
An interrupt request can be designated by the DTCER bit. At the end of a data transfer (or the last
consecutive transfer in the case of chain transfer), the activation source interrupt flag or
corresponding bit to DTCER is cleared. For example, the activation source flag, in the case of
SCI3_1_RXI, is the RDRF flag of SCI3_1.
When an interrupt has been designated a DTC activation source, existing CPU mask level and
interrupt controller priorities have no effect. If there is more than one activation source at the same
time, the DTC operates in accordance with the default priorities for the interrupt sources.
Table 11.2 shows a relationship between activation sources and DTCER clear conditions. Figure
11.2 shows a block diagram of DTC activation source control. For details, see section 4, Interrupt
Controller.
Table 11.2 Relationship between Activation Sources and DTCER Clearing
Activation Source
DISEL = 0 and Specified
Number of Transfers Has
Not Ended
DISEL = 1 or Specified
Number of Transfers Has
Ended
Activation by software SWDTE bit is cleared to 0
• SWDTE bit remains set to 1
• Interrupt request to CPU
Activation by an interrupt
• Corresponding DTCER bit
remains set to 1.
• Activation source flag is
cleared to 0.
• Corresponding DTCER bit is
cleared to 0.
• Activation source flag
remains set to 1.
• Interrupt that became the
activation source is
requested to the CPU.