Datasheet

Section 10 I/O Ports
Page 330 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
10.10 Port J
Port J consists of pins PJ1 and PJ0. These pins can also be used as external oscillation pins and
clock output pin. Figure 10.10 shows the pin configuration of port J. In selection of the function of
these multiplexed pins, the PMRJ register setting is given priority.
Port J
PJ1/OSC2/CLKOUT
PJ0/OSC1
Figure 10.10 Port J Pin Configuration
Port J has the following registers.
• Port mode register J (PMRJ)
• Port control register J (PCRJ)
• Port data register J (PDRJ)
• Port pull-up control register J (PUCRJ)