Datasheet

Section 10 I/O Ports
Page 304 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
10.6.3 Port Data Register 8 (PDR8)
b7
PDR87
0
b6
PDR86
0
b5
PDR85
0
b4
⎯
0
b3
⎯
0
b2
⎯
0
b1
⎯
0
b0
⎯
0
H'FFFFE7
Bit:
Address:
Value after reset:
Bit Symbol Bit Name Description R/W
7 PDR87 Port 87 data R/W
6 PDR86 Port 86 data R/W
5 PDR85 Port 85 data
0: Low level
1: High level
PDR8 is a register that stores output data for port
8 pins. When PCR8 bits are set to 1, the values
stored in PDR8 are output.
When PDR8 is read while PCR8 bits are set to 1,
the values stored in PDR8 are read. If PDR8 is
read while PCR8 bits are cleared to 0, the pin
states are read regardless of the value stored in
PDR8.
R/W
4 to 0 ⎯ Reserved These bits are read as 0. The write value should
be 0.
⎯