Datasheet

Section 9 Peripheral I/O Mapping Controller
Page 248 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
(d) Port 2 Peripheral Function Mapping Register 4 (PMCR24)
b7
⎯
0
b6
0
b5
P27MD[2:0]
1
b4
0
b3
⎯
0
b2
0
b1
P26MD[2:0]
1
b0
0
H'FF0047
Bit:
Address:
Value after reset:
Bit Symbol Bit Name Description R/W
7 ⎯ Reserved This bit is always read as 0. The write value
should always be 0.
⎯
6 to 4 P27MD[2:0] P27 function
select
000: Setting prohibited
001: IRQ7 input
010: TXD_2 output (SCI3_2) (initial value)
011: TXD_3 output (SCI3_3)
100: SSI input/output (SSU)
101: FTIOD1 input/output (timer RD_0)
110: ADTRG2 input (AD_2)
111: Setting prohibited
R/W
3 ⎯ Reserved This bit is always read as 0. The write value
should always be 0.
⎯
2 to 0 P26MD[2:0] P26 function
select
000: Setting prohibited
001: IRQ6 input
010: RXD_2 input (SCI3_2) (initial value)
011: RXD_3 input (SCI3_3)
100: SCS input/output* (SSU)
101: FTIOC1 input/output (timer RD_0)
110: ADTRG1 input (AD_1)
111: Setting prohibited
R/W
Note: * If the SCS output pin of the SSU is set, the NMOS open-drain output cannot be
selected.