Datasheet

Section 4 Interrupt Controller
REJ09B0465-0300 Rev. 3.00 Page 95 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
Origin of
Interrupt
Source Interrupt Source
Vector
Number Vector Address*
1
DTCER IPR Priority
⎯
Reserved 63 to 68 H'00FC to H'0113 ⎯ ⎯
High
Timer RA/
HW-LIN
1. Timer RA
⎯ ITAUD
2. HW-LIN
⎯ Bus conflict
detection
(BCDCT)
⎯ Sync Break
detection
(SBDCT)
⎯ Sync Field
measurement
end (SFDCT)
69 H'0114 to H'0117 ⎯ IPRG5 and
IPRG4
Timer RB
ITBUD 70 H'0118 to H'011B ⎯ IPRG3 and
IPRG2
ITCMA (input
capture A/compare
match A)
71 H'011C to H'011F DTCED3
ITCMB (input
capture B/compare
match B)
72 H'0120 to H'0123 DTCED2
ITCMC (input
capture C/compare
match C)
73 H'0124 to H'0127 DTCED1
ITCMD (input
capture D/compare
match D)
74 H'0128 to H'012B DTCED0
Timer RC*
3
ITCOV counter
overflow
75 H'012C to H'012F ⎯
IPRG1 and
IPRG0
ITDMA0_0 (input
capture A/compare
match A)
76 H'0130 to H'0133 DTCEE7
Timer RD
unit 0
channel 0
ITDMB0_0 (input
capture B/compare
match B)
77 H'0134 to H'0137 DTCEE6
IPRH7 and
IPRH6
Low