Datasheet

Page xii of xxvi
Section 6 Power-Down Modes.......................................................................... 141
6.1 Register Descriptions......................................................................................................... 142
6.1.1 Power-Down Control Registers 1, 2, and 3 (LPCR1, LPCR2, LPCR3) ............... 142
6.1.2 Module Standby Control Register 1 (MSTCR1) .................................................. 142
6.1.3 Module Standby Control Register 2 (MSTCR2) .................................................. 144
6.1.4 Module Standby Control Register 3 (MSTCR3) .................................................. 145
6.2 Mode Transitions and States of LSI................................................................................... 147
6.2.1 Active Mode ......................................................................................................... 149
6.2.2 Sleep Mode ........................................................................................................... 149
6.2.3 Standby Mode....................................................................................................... 150
6.3 Bus Master Clock Division Function................................................................................. 150
6.3.1 Reset States........................................................................................................... 150
6.4 Module Standby Function.................................................................................................. 151
6.5 PSC Divider Stop Function................................................................................................ 151
Section 7 ROM ..................................................................................................153
7.1 Overview............................................................................................................................ 153
7.2 Block Configuration .......................................................................................................... 154
7.3 CPU Reprogramming Mode .............................................................................................. 159
7.3.1 EW0 Mode............................................................................................................ 161
7.3.2 EW1 Mode............................................................................................................ 161
7.4 Register Descriptions......................................................................................................... 162
7.4.1 Flash Memory Control Register 1 (FLMCR1)...................................................... 162
7.4.2 Flash Memory Control Register 2 (FLMCR2)...................................................... 164
7.4.3 Flash Memory Data Flash Protect Register (DFPR)............................................. 166
7.4.4 Flash Memory Status Register (FLMSTR)........................................................... 167
7.5 On-Board Programming..................................................................................................... 170
7.5.1 Boot Mode ............................................................................................................ 170
7.5.2 Specifications of Standard Serial Communication Interface in Boot Mode ......... 175
7.5.3 Programming/Erasing in User Mode .................................................................... 210
7.6 Programming/Erasing ........................................................................................................ 212
7.6.1 Software Commands............................................................................................. 212
7.7 Protection........................................................................................................................... 228
7.7.1 Software Protection............................................................................................... 228
7.7.2 Lock-Bit Protection............................................................................................... 228
7.7.3 PROM Programmer Protection/Boot Mode Protection ........................................ 229
7.8 Programmer Mode ............................................................................................................. 230
7.9 Usage Notes ....................................................................................................................... 231
Section 8 RAM ..................................................................................................235