Datasheet

Section 4 Interrupt Controller
Page 76 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
A block diagram of the interrupt controller is shown in figure 4.1.
INTCR
NMI input
IRQ input
Internal
interrupt
sources
IAD to
ITGUD
INTM1 INTM0
NMIEG
NMI input unit
IRQ input unit
ISR
ISCR
IER
IPR
Interrupt controller
Priority
determination
Interrupt
request
Vector
number
I
I1 to I0
CCR
EXR
CPU
Figure 4.1 Block Diagram of Interrupt Controller
Table 4.1 shows the pin configuration of the interrupt controller.
Table 4.1 Pin Configuration
Name I/O Function
NMI Input Nonmaskable external interrupt
Rising or falling edge can be selected.
IRQ7 to IRQ0 Input Maskable external interrupts
Rising, falling, or both edges can be selected independently.