Datasheet

Section 3 Exception Handling
Page 74 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
3.8 Usage Note
When accessing word data or longword data, this LSI assumes that the lowest address bit is 0. The
stack should always be accessed by word transfer instruction or longword transfer instruction, and
the value of the stack pointer (SP, ER7) should always be kept even.
Use the following instructions to save registers:
PUSH.W Rn (or MOV.W Rn, @-SP)
PUSH.L ERn (or MOV.L ERn, @-SP)
Use the following instructions to restore registers:
POP.W Rn (or MOV.W @SP+, Rn)
POP.L ERn (or MOV.L @SP+, ERn)
Setting SP to an odd value may lead to a malfunction. Figure 3.3 shows an example of operation
when the SP value is odd.
SP→
[Legend]
CCR :
PC :
R1L :
SP :
Condition code register
Program counter
General register R1L
Stack pointer
CCR
SP→
TRAPA instruction executed
MOV.B R1L,@-ER7
Address
SP→
R1L
H'FFFEFA
H'FFFEFB
H'FFFEFC
H'FFFEFD
H'FFFEFE
H'FFFEFF
PC PC
Data saved above SP
Instruction executed
Contents of CCR lost
SP set to H'FFFEFF
Note: This diagram illustrates an example in which the interrupt control mode is 0, in advanced mode.
Figure 3.3 Operation when SP Value Is Odd