Datasheet

REJ09B0465-0300 Rev. 3.00 Page 961 of 982
Sep 17, 2010
Item Page Revision (See Manual for Details)
(d) Port 3 Peripheral Function
Mapping Register 4
(PMCR34)
252 Amended
Bit Description
6 to 4 :
100: SSI/SCL
input/output*
1
(SSU/IIC2)
101: FTIOD1 input/output (timer RD_0)
110: ADTRG2 input (AD_2)*
1
111: Setting prohibited
2 to 0 :
100: SCS/SDA input/output*
1
*
2
(SSU/IIC2)
101: FTIOC1 input/output (timer RD_0)
110: ADTRG1 input (AD_1)
111: Setting prohibited
Notes: 1. When the IIC2/SSU is used as the IIC2
function, the SCL and SDA functions should be
allocated to the P56 and P57 pins because SCL
and SDA require buffers dedicated for IIC
input/output. When the ICSU is used for the
SSU function except *
3
, there is no restriction.
1. This function cannot be selected for the
H8S/20103, H8S/20203, H8S/20115, and
H8S/20215 Groups.
2. If the SCS output pin of the SSU is set, the
NMOS open-drain output cannot be selected.
(d) Port 5 Peripheral Function
Mapping Register 4
(PMCR54)
257 Amended
Notes: 1. When the IIC2/SSU is used as the IIC2 function,
the SCL and SDA functions can be allocated to
the P56 and P57 pins only because SCL and
SDA require buffers dedicated for IIC
input/output. The PMC can not be used to
allocate the SCL and SDA functions to other
pins. When the IIC2/SSU is used for the SSU
function except *
2
, there is no restriction.