Datasheet

Section 26 Low-Voltage Detection Circuits
REJ09B0465-0300 Rev. 3.00 Page 871 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
(2) Low Voltage Detect Interrupt 2 (LVDI2)
LVDI2 is an interrupt generated by the LVD2 circuit. Figure 26.8 shows the operation timing of
LVDI2.
The LVD2 enters the module-standby state after release from a power-on reset. To operate the
LVDI2, set the VD2E bit in LD2CRL to 1, wait for 50 μs (t
d(E-A)
) until the detection voltage and the
low-voltage detection circuit 2 operation have stabilized using a software timer, etc., then clear the
VD2MS bit to 0 and set the VD2RE bit to 1 in LD2CRH. After that, the output settings of I/O
ports must be made. To cancel the LVDI2, first the VD2RE bit in LD2CRH should be cleared to 0
and then the VD2E bit in LD2CRL should be cleared to 0. Figure 26.9 shows the procedure to set
the LVDI2.
When the power-supply voltage falls below Vdet2, the LVDI2 clears the LVDINT2 signal to 0
and the VD2DFS bit in LD2CRH is set to 1. If the VD2DFS or VD2IRCS bit in LD2CRH is 1 at
this time, an LVD2 interrupt request is simultaneously generated. In this case, the necessary data
must be saved in the on-chip flash memory area or external EEPROM, etc, and a transition must
be made to standby mode or sleep mode. Until this processing is completed, the power supply
voltage must be higher than the lower limit of the guaranteed operating voltage.
When the power-supply voltage does not fall below Vdet0 but rises above Vdet2, the LVDI2 sets
the LVDINT2 signal to 1 and set the VD2UF bit in LD2CRH to 1. If the VD2DFS bit in LD2CRH
is 1 or the VD2IRCS bit in LD2CRH is 0 at this time, an LVD2 interrupt request is simultaneously
generated.
If the power supply voltage falls below Vdet0, a power-on reset occurs.