Datasheet

Section 25 D/A Converter
Page 850 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
Table 25.1 shows the input/output pin configuration of the D/A converter.
Table 25.1 Pin Configuration
Pin Name I/O Function
AVcc Input Analog power supply
AVss Input Analog ground
DA0 Output Channel 0 analog output
DA1 Output Channel 1 analog output
25.2 Register Descriptions
• D/A data register 0 (DADR0)
• D/A data register 1 (DADR1)
• D/A control register (DACR)
25.2.1 D/A Data Registers 0 and 1 (DADR0 and DADR1)
• DADR0 and DADR1
Address:
Bit:
Value after reset:
b7
0
b6
0
b5
0
b4
0
b3
0
b2
0
b1
0
b0
0
H'FF05D4, H'FF05D5
DADR0, DADR1
DADR0 and DADR1 are 8-bit readable/writable registers that store data for conversion. Whenever
analog output is enabled, the values in DADR are converted and output to the analog output pins.
DADR is initialized to H'00 in standby mode or module standby.