Datasheet

Section 24 A/D Converter
REJ09B0465-0300 Rev. 3.00 Page 833 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
24.4 A/D Conversion Mode Operation
24.4.1 Single Mode in A/D Conversion Mode
In single mode in A/D conversion mode, A/D conversion is to be performed only once on the
specified single channel. Operations are as follows.
1. A/D conversion is started when the ADST bit in ADCSR is set to 1, according to the software
or external trigger input.
2. When A/D conversion is completed, the result is transferred to the A/D data register
corresponding to the channel.
3. On completion of conversion, the ADF bit in ADCSR is set to 1. If the ADIE bit is set to 1 at
this time, an ADI interrupt request is generated.
4. The ADST bit remains set to 1 during A/D conversion, and is automatically cleared to 0 when
conversion ends. When the ADST bit is cleared to 0 during A/D conversion, A/D conversion
stops and the A/D converter enters wait state.