Datasheet

Section 21 I
2
C Bus Interface 2 (IIC2)
Page 736 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
Bit Symbol Bit Name Description R/W
4 SDAOP SDAO write
protect
This bit controls change of output level of the SDA
pin by modifying the SDAO bit. To change the
output level, clear SDAO and SDAOP to 0 or set
SDAO to 1 and clear SDAOP to 0 by the MOV
instruction. This bit is always read as 1.
R/W
3 SCLO SCL output
level monitor
This bit monitors SCL output level. When reading
and SCLO is 1, SCL pin outputs high. When
reading and SCLO is 0, SCL pin outputs low.
Writing 1 to the IICRST bit also sets this bit to 1.
R
2 ⎯ Reserved This bit is read as 1. The write value should be 1. ⎯
1 IICRST*
2
IIC control part
reset
This bit resets the control part except for I
2
C
registers. If this bit is set to 1 when hang-up occurs
because of communication failure during I
2
C
operation, I
2
C control part can be reset without
setting ports and initializing registers.
R/W
0 ⎯ Reserved This bit is read as 1. The write value should be 1. ⎯
Notes: 1. In standby mode, the BBSY bit in ICCR2 is reset.
2. Clear IICRST to 0 by software since this bit is not cleared automatically.
3. Writing to this bit is invalid during a reset due to setting the IICRST bit in ICCR2 to 1.