Datasheet

Section 21 I
2
C Bus Interface 2 (IIC2)
Page 732 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
21.2 Register Descriptions
The IIC2 has the following registers.
• IIC2/SSU select register (ICSUSR)
• I
2
C bus control register 1 (ICCR1)
• I
2
C bus control register 2 (ICCR2)
• I
2
C bus mode register (ICMR)
• I
2
C bus interrupt enable register (ICIER)
• I
2
C bus status register (ICSR)
• I
2
C bus slave address register (SAR)
• I
2
C bus transmit data register (ICDRT)
• I
2
C bus receive data register (ICDRR)
• I
2
C bus shift register (ICDRS)
21.2.1 IIC2/SSU Select Register (ICSUSR)
Address:
Bit:
Value after reset:
b7
⎯
0
b6
⎯
0
b5
⎯
0
b4
⎯
0
b3
⎯
0
b2
⎯
0
b1
⎯
0
b0
SELICSU
0
H'FF000B
Bit Symbol Bit Name Description R/W
7 to 1 ⎯ Reserved These bits are read as 0. The write value should
be 0.
⎯
0 SELICSU IIC2/SSU
module function
select
0: IIC2 function is selected.*
1: SSU function is selected.
R/W
Note: To select the IIC2 function, this bit should be set to 0 without fail.