Datasheet

Section 20 Serial Communication Interface 3 (SCI3, IrDA)
REJ09B0465-0300 Rev. 3.00 Page 715 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
No
<End>
Yes
Start transmission
Read TDRE flag in SSR[1]
Set MPBT bit in SSR
Yes
No
No
Yes
Read TEND flag in SSR
[2]
No
Yes
[3]
Clear PDR to 0, set PCR to 1
and clear PMR to 0
Clear TE bit in SCR3 to 0
TDRE = 1
Is data transmission continued?
TEND = 1
Break output?
Write transmit data to TDR
[1] Read SSR and check that the TDRE
flag is set to 1, set the MPBT bit in
SSR to 0 or 1, then write transmit
data to TDR. When data is written to
TDR, the TDRE flag is automatically
cleared to 0.
[2] To continue data transmission, be
sure to read 1 from the TDRE flag to
confirm that writing is possible, then
write data to TDR. When data is
written to TDR, the TDRE flag is
automatically cleared to 0.
If data is transferred to TDR by the
DTC with a transmit data empty
interrupt (TXI) request, the TDRE flag
is automatically checked and cleared.
[3] To output a break in serial
transmission, set the port PCR to 1,
clear PDR and PMR to 0, then clear
the TE bit in SCR3 to 0.
Figure 20.16 Sample Flowchart for Multiprocessor Data Transmission