Datasheet

Section 18 Timer RG
REJ09B0465-0300 Rev. 3.00 Page 653 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
GRA
TRGCNT value
Time
Counter cleared on
compare match A
Counter cleared
on compare match B
GRB
H'0000
TGIOA
GRB
TRGCNT value
Time
GRA
H'0000
TGIOA
(a) Counter cleared by GRA
(b) Counter cleared by GRB
Figure 18.10 Example of PWM Mode Operation (1)
Figure 18.11 shows examples of PWM waveform output with 0% duty cycle and 100% duty cycle
in PWM mode. When GRB compare match is set as the counter clearing source and the set value
in GRA is greater than the value in GRB, the duty cycle of the PWM waveform is 0%. When
GRA compare match is set as the counter clearing source and the set value in GRB is greater than
the value in GRA, the duty cycle is 100%.