Datasheet

Section 17 Timer RE
REJ09B0465-0300 Rev. 3.00 Page 619 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
TRECSR selects clock output, operating mode, and clock source.
• RCS6 to RCS4 (clock output select)
Selects a clock output from the TREO pin when the TOENA bit in TRECR1 is set to 1.
• RCS1 and RCS0 (clock source select)
Selects a clock source for output-compare mode. For realtime clock mode, the subclock φsub
(32.768 kHz) is selected regardless of the setting of these bits.
17.3 Operation of Realtime Clock Mode
17.3.1 Initial Settings of Registers after Power-On
The timer RE registers that contain second, minute, hour, and day-of-week data are not initialized
by a reset by the RES pin, LVD, or watchdog timer. Therefore, all registers must be set to their
initial values after power-on. Once the register settings are made, the timer RE provides an
accurate time as long as power is supplied regardless of the RES pin, LVD, or watchdog timer
reset.
17.3.2 Initial Setting Procedure
Figure 17.3 shows the procedure for the initial setting of the timer RE to be used in realtime clock
mode. To set the timer RE again, also follow this procedure.