Datasheet

Section 16 Timer RD
REJ09B0465-0300 Rev. 3.00 Page 593 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
16.3.14 Operation by Event Clear
Using the event link controller (ELC), timer RD unit 0 can be made to operate in the following
ways in relation to events occurring in other modules. Each channel 0 and 1 can be specified
independently.
(1) Staring Counter Operation
The start of counting operations by timer RD can be selected by ELOPA and ELOPB of the ELC.
When the event specified by ELSR3 and ELSR4 occur, the STR[1:0] bits in TRDSTR are set to 1,
which stars counting by timer RD. However, if the specified event occurs when the STR bit has
already been set to 1, the event is not effective.
(2) Counting Event
The counting of events by timer RD can be selected by ELOPA and ELOPB of the ELC. When
the event specified in ELSR3 and ELSR4 occurs, event counter operation proceeds with that event
as the source to drive counting, regardless of the setting of the TPSC[2:0] bits in TRDCR and the
STR1 and STR0 bits in TRDSTR. When the value of the counter is read, the value read out is the
actual number of input events.
(3) Input Capture
Input capture operation of timer RD can be selected by ELOPA and ELOPB of the ELC. When
the event specified in ELSR3 and ELSR4 occurs, GRD captures the value of TRDCNT. When
input capture operation initiated by an event link is in use, set the IOD[3:0] bits = b'1101 in
TRDIORC of timer RD, set the STR bit in TRDSTR to 1, and then start the counter. Since input
on the FTIOD pin becomes valid at the same time, fix the input to the FTIOD pin or take other
measures such as not allocating the FTIOD pin to the port in the PMC, etc.