Datasheet

Section 16 Timer RD
Page 554 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
16.3.4 Synchronous Operation
In synchronous operation, the values in a number of TRDCNT counters can be rewritten
simultaneously (synchronous presetting). Also, a number of TRDCNT counters can be cleared
simultaneously by making the appropriate setting in TRDCR (synchronous clearing). Synchronous
operation enables GR to be increased with respect to a single time base.
Figure 16.19 shows an example of the synchronous operation setting procedure.
No
Yes
Synchronous operation
selection
Clearing
source generation
channel?
Set synchronous
operation
Select counter
clearing source
Synchronous presetting
Set TRDCNT
Synchronous clearing
[1]
[2]
[3]
Select counter
clearing source
[4]
Start counter operation
[5]
Start counter operation
[5]
[1] Set the SYNC bits in TRDMDR to 1.
[2] When a value is written to either of the TRDCNT counters, the same value is simultaneously written to the other
TRDCNT counter.
[3] Set bits CCLR1 and CCLR0 in TRDCR to specify counter clearing by compare match/input capture.
[4] Set bits CCLR1 and CCLR0 in TRDCR to designate synchronous clearing for the counter clearing source.
[5] Set the STR bit in TRDSTR to 1 to start the count operation.
<Synchronous presetting> <Synchronous clearing><Counter clearing>
Figure 16.19 Example of Synchronous Operation Setting Procedure