Datasheet

Section 16 Timer RD
REJ09B0465-0300 Rev. 3.00 Page 533 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
16.2.15 PWM Mode Output Level Control Register (POCR)
Address:
Bit:
Value after reset:
b7
⎯
1
b6
⎯
1
b5
⎯
1
b4
⎯
1
b3
⎯
1
b2
POLD
0
b1
POLC
0
b0
POLB
0
H'FFFFC9, H'FFFFD0
Bit Symbol Bit Name Description R/W
7 to 3 ⎯ Reserved These bits are read as 1. The write value should
be 1.
⎯
2 POLD PWM mode output
level control D
0: The output level of FTIOD is active low.
1: The output level of FTIOD is active high.
R/W
1 POLC PWM mode output
level control C
0: The output level of FTIOC is active low.
1: The output level of FTIOC is active high.
R/W
0 POLB PWM mode output
level control B
0: The output level of FTIOB is active low.
1: The output level of FTIOB is active high.
R/W
Timer RD has two POCR registers, one for each channel.