Datasheet

Section 16 Timer RD
REJ09B0465-0300 Rev. 3.00 Page 517 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
16.2.6 Timer RD Output Master Enable Register 2 (TRDOER2)
Address:
Bit:
Value after reset:
b7
PTO
0
b6
⎯
1
b5
⎯
1
b4
⎯
1
b3
⎯
1
b2
⎯
1
b1
⎯
1
b0
⎯
1
H'FFFFD7
Bit Symbol Bit Name Description R/W
7 PTO Timer output
disabled mode
0: The corresponding bit in TRDOER1 is not set to 1
when the low level is input to the TRDOI pin
1: The corresponding bit in TRDOER1 is set to 1
when the low level is input to the TRDOI pin
R/W
6 to 0 ⎯ Reserved These bits are read as 1. The write value should be
1.
⎯
16.2.7 Timer RD Output Control Register (TRDOCR)
Address:
Bit:
Value after reset:
b7
TOD1
0
b6
TOC1
0
b5
TOB1
0
b4
TOA1
0
b3
TOD0
0
b2
TOC0
0
b1
TOB0
0
b0
TOA0
0
H'FFFFD8
Bit Symbol Bit Name Description R/W
7 TOD1 Output level
select D1
0: 0 output at the FTIOD1 pin*
1: 1 output at the FTIOD1 pin*
R/W
6 TOC1 Output level
select C1
0: 0 output at the FTIOC1 pin*
1: 1 output at the FTIOC1 pin*
R/W
5 TOB1 Output Level
Select B1
0: 0 output at the FTIOB1 pin*
1: 1 output at the FTIOB1 pin*
R/W
4 TOA1 Output level
select A1
0: 0 output at the FTIOA1 pin*
1: 1 output at the FTIOA1 pin*
R/W
3 TOD0 Output level
select D0
0: 0 output at the FTIOD0 pin*
1: 1 output at the FTIOD0 pin*
R/W