Datasheet

Section 14 Timer RB
REJ09B0465-0300 Rev. 3.00 Page 429 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
14.3 Operation
14.3.1 Timer Mode
The internal clock pulses or timer RA underflows are counted as a count source in timer mode.
When an underflow occurs on the timer RB counter, the value of TRBPR is reloaded and counting
is continued. TRBOCR and TRBSC are not used in timer mode. A count source is selected with
the TCK[2:0] bits in TRBMR.
(1) Starting and Stopping Operation
Writing the value 1 to the TSTART bit in TRBCR starts counting; writing the value 0 to the
TSTART bit stops the counting.
(2) Forced Termination of Operation
Writing 1 to the TSTOP bit in TRBCR stops the counting forcedly. When the counting is forcedly
stopped, the timer RB counter, the prescaler counter, and any associated flags are initialized.
(3) Interrupt Request
An interrupt request is generated on the underflow of the timer RB counter.
(4) Reading and Writing Count Value
Reading TRBPRE and TRBTR reads count values from each register.
If a write is performed to TRBPRE or TRBTR when the counting is stopped, a specified value is
written to both the reload register and the counter.
If a write is performed to TRBPRE during counting when TWRC in TRBMR is 0, first a set value
is written to the reload register, and the set value is then transferred to the prescaler counter in
synchronization with the count source. If a write is performed to TRBPR, a set value is written to
the reload register in synchronization with the underflow of the prescaler after four cycles of the
count source of the prescaler, and the set value is transferred to the timer counter in
synchronization with the next underflow of the prescaler.
For this reason, if a write is performed to TRBPRE or TRBPR during counting when TWRC is 1,
the value is written only to the reload register. Loading to the counter is performed in
synchronization with the underflow of the prescaler or timer counter.