Datasheet

Section 14 Timer RB
Page 426 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
14.2.5 Timer RB Interrupt Request Status Register (TRBIR)
b7
TRBIE
0
b6
TRBIF
0
b5
⎯
0
b4
⎯
0
b3
⎯
0
b2
⎯
0
b1
⎯
0
b0
⎯
0
H'FFFFA7
Bit:
Address:
Value after reset:
Bit Symbol Bit Name Description R/W
7 TRBIE Interrupt enable 0: Timer RB interrupt requests are disabled.
1: Timer RB interrupt requests are enabled.
R/W
6 TRBIF Interrupt request flag [Setting conditions]
Timer mode
• When the timer RA underflows.
Programmable waveform generation mode
• A half cycle of the count source after the
counter underflow in the secondary period
Programmable one-shot generation mode.
• A half cycle of the count source after the
counter underflow
Programmable wait one-shot generation mode
• A half cycle of the counter source after the
counter underflow in the secondary period
[Clearing condition]
• When 1 is read from the bit and then 0 is
written to.
R/W
5 to 0 ⎯ Reserved These bits are read as 0. The write value should
be 0.
⎯