Datasheet

Section 11 Data Transfer Controller (DTC)
REJ09B0465-0300 Rev. 3.00 Page 339 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
MRA selects the DTC operating mode.
• SM[1:0] bits (source address mode 1 and 0)
These bits specify an SAR operation after data transfer.
• DM[1:0] bits (destination address mode 1 and 0)
These bits specify a DAR operation after data transfer.
• MD[1:0] bits (DTC mode 1 and 0)
These bits specify the DTC transfer mode.
• DTS bit (DTC transfer mode select)
This bit specifies whether the source side or the destination side is set to be a repeat area or
block area, in repeat mode or block transfer mode.
• Sz bit (DTC data transfer size)
This bit specifies the size of data to be transferred.