Datasheet

Section 10 I/O Ports
Page 328 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
10.9.2 Port Data Register B (PDRB)
b7
PDRB7
0
b6
PDRB6
0
b5
PDRB5
0
b4
PDRB4
0
b3
PDRB3
0
b2
PDRB2
0
b1
PDRB1
0
b0
PDRB0
0
H'FFFFEA
Bit:
Address:
Value after reset:
Bit Symbol Bit Name Description R/W
7 PDRB7 Port B7 data R/W
6 PDRB6 Port B6 data R/W
5 PDRB5 Port B5 data R/W
4 PDRB4 Port B4 data R/W
3 PDRB3 Port B3 data R/W
2 PDRB2 Port B2 data R/W
1 PDRB1 Port B1 data R/W
0 PDRB0 Port B0 data
0: Low level
1: High level
PDRB is a register that stores output data for port B
pins. When PCRB bits are set to 1, the values
stored in PDRB are output.
When PDRB is read while PCRB bits are set to 1,
the values stored in PDRB are read. If PDRB is
read while PCRB bits are cleared to 0, the pin
states are read regardless of the value stored in
PDRB.
When the pins are set as analog input channels by
ADCSR and ADCR of the A/D converter, however,
the corresponding PDRB bits are always read as 1
even if the respective PCRB bits are cleared to 0.
Similarly, when pins PB6 and PB7 are set as analog
output for the D/A converter by bit DAOE1 in DACR
of the D/A converter, the corresponding PCRB bits
are always read as 1 even if they are cleared to 0.
R/W