Datasheet

Section 9 Peripheral I/O Mapping Controller
Page 258 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
(5) Port 6
(a) Port 6 Peripheral Function Mapping Register 1 (PMCR61)
b7
⎯
0
b6
1
b5
P61MD[2:0]
0
b4
1
b3
⎯
0
b2
1
b1
P60MD[2:0]
0
b0
1
H'FF0054
Bit:
Address:
Value after reset:
Bit Symbol Bit Name Description R/W
7 ⎯ Reserved This bit is always read as 0. The write value
should always be 0.
⎯
6 to 4 P61MD[2:0] P61 function
select
000: Setting prohibited
001: IRQ1 input
010: RXD input (SCI3_1)
011: FTIOB input/output (timer RC)*
100: TCLKB input (timer RG)
101: FTIOB0 input/output (timer RD_0)
(initial value)
110: TRGB input (timer RB)
111: Setting prohibited
R/W
3 ⎯ Reserved This bit is always read as 0. The write value
should always be 0.
⎯
2 to 0 P60MD[2:0] P60 function
select
000: Setting prohibited
001: IRQ0 input
010: SCK3 input/output (SCI3_1)
011: FTIOA input/output (timer RC)*
100: TCLKA input (timer RG)
101: FTIOA0 input/output (timer RD_0)
(initial value)
110: TREO output (timer RE)
111: Setting prohibited
R/W
Note: * The timer RC is not available on the H8S/20203, H8S/20223, H8S/20215, and
H8S/20235 Groups. These bits are reserved and the function cannot be selected for
these groups.