Datasheet

Section 7 ROM
Page 214 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
No
Ye s
DFPR[x] = 0*
2
FMLBD = 1
To processing for issuing
commands
Command issued for
the program region?
No
Ye s
Command issued
for data flash?
Transfer the overwriting
program to RAM.
Set the interrupt vector offset by
VOFR and place the interrupt
vectors in RAM.*
1
Jump to the overwriting
program in RAM.
FMEWMOD = 0
FMCMDEN = 1
Start
No
Ye s
FMEWMOD = 1
FMCMDEN = 1
Start
FMLBD = 1
To processing for issuing
commands
Command issued for
the program region?
No
Ye s
DFPR[x] = 0*
2
Command issued
for data flash?
1
1
For any interrupts that are in use, allocate the interrupt vector entries and interrupt routines to RAM.
If interrupts are not to be used, allocation to RAM is not necessary.
1. Within the flow, set the CPU overwriting unit selection bit (FMWUS) to select the unit of overwriting.
2. Set the DFPR according to the area of data-flash memory for which commands are to be issued.
Notes:
Flow of initialization for EW1 mode*
1
Flow of initialization for EW0 mode*
1
Figure 7.13 Initialization for E/W Mode