Datasheet
Section 7 ROM
REJ09B0465-0300 Rev. 3.00 Page 175 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
Block 2
Block 3
Block 4
Block 5
Before reprogramming erase blocks 3 and
4 on which the programming end command
is issued, erase the blocks 3 and 4.
Programming
end area
Figure 7.5 Example of Erase Block Including Programmed Area
7.5.2 Specifications of Standard Serial Communication Interface in Boot Mode
The boot program activated in boot mode communicates with the host via the on-chip SCI3_1.
The following describes the specifications of the serial communication interface between the host
and the boot program.
The boot program has three states.
1. Bit-rate adjustment state
In this state, the boot program adjusts the SCI3_1 bit rate to match that of the host to perform
serial communication with the host. When this LSI is started up in boot mode, the boot
program is activated and enters the bit-rate adjustment state, in which it receives command
from the host and adjusts the bit rate accordingly. After bit rate adjustment is completed, the
boot program enters the inquiry/selection state.
2. Inquiry/selection state
In this state, the boot program responds to inquiry commands from the host. The device, clock
mode, and bit rate are selected. Upon completion of selection, the boot program enters the
programming/erasure state in response to the programming/erasure state transition command.
Before entering the programming/erasure state, the boot program transfers the erasure-related
libraries to the on-chip RAM and erases the user ROM areas.
3. Programming/erasure state
In this state, the boot program executes programming/erasure. The boot program transfers the
program for programming/erasure to the on-chip RAM according to the command transmitted
from the host and executes programming/erasure. The boot program also executes sum
checking and blank checking as directed using the corresponding commands.