Datasheet

Section 7 ROM
REJ09B0465-0300 Rev. 3.00 Page 165 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
FLMCR2 enables/disables flash memory interrupts, enables/controls a transition to erase-suspend
mode.
• FMRDYIE bit (flash read-ready interrupt enable)
Setting the FMRDYIE bit to 1 enables an interrupt to be generated when the flash memory
changes from the busy state to the ready state.
• FMBSYRDIE bit (flash busy-read interrupt enable)
Setting the FMBSYRDIE bit to 1 enables an interrupt to be generated when the user ROM area
is accessed while the flash memory is in the busy state.
• FMISPE bit (suspend-request enable by interrupt request)
Setting the FMISPE bit to 1 in EW0 mode allows the FMSPREQ bit to be automatically set to
1 (to request a transition to erase-suspend mode) thus causing a transition to erase-suspend
mode when an interrupt is requested.
• FMSPREQ bit (erase suspend)
Setting the FMSPREQ bit to 1 causes a transition to erase-suspend mode. To resume erasure,
set the FMSPREQ bit to 0.
• FMSPEN bit (erase-suspend enable)
Setting the FMSPEN bit to 1 enables a transition to erase-suspend mode.