Datasheet
Section 7 ROM
REJ09B0465-0300 Rev. 3.00 Page 161 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
7.3.1 EW0 Mode
EW0 mode can be selected by transferring the reprogramming-control program to the RAM,
branching to the program in the RAM, setting the FMEWMOD bit in FLMCR1 to 0, and setting
the FMCMDEN bit in FLMCR1 to 1 (to enable software commands), in this order.
Programming and erasure operations can be controlled through software commands. Completion
of the software command and related information can be read out from the FLMSTR register.
To cause a transition to erase-suspend mode during erasure, set both the FMSPEN and FMSPREQ
bits in FLMCR2 to 1 (to enable a transition to erase-suspend mode and to request a transition to
erase-suspend mode, respectively). Then wait for the transition time to erase-suspend mode
(approximately 50 μs), check that the FMRDY bit in FLMSTR is 1 (ready state), and access the
user ROM area. Setting the FMSPREQ bit to 0 resumes erasure.
When the interrupt is used, set the interrupt vector offset register (VOFR) such that access to the
user ROM area is not generated. That is, the vectors should have addresses within the RAM and
point to interrupt processing routines that are also in the RAM. If the user ROM area is to be read
while software commands are enabled (the FMCMDEN bit in FLMCR1 is 1), set bus master
operation clock φs to a frequency below 5 MHz.
7.3.2 EW1 Mode
EW1 mode can be selected by setting the FMEWMOD bit in FLMCR1 to 1, and then setting the
FMCMDEN bit in FLMCR1 to 1 (to enable software commands).
Programming and erasure operations can be controlled through software commands. Completion
of the software command and related information can be read out from the FLMSTR register.
To cause a transition to erase-suspend mode during erasure, set the FMSPEN bit in FLMCR2 to 1
(to enable a transition to erase-suspend mode), and then execute the erasure command. Note that
the interrupt for causing a transition to erase-suspend mode must be enabled beforehand. This
allows the interrupt request to be accepted when the transition time to erase-suspend mode has
elapsed after the erasure command is executed.
When an interrupt is requested, the FMSPREQ bit is automatically set to 1 (to request a transition
to erase-suspend mode), thus suspending erasure. If erasure has not been completed at the end of
interrupt processing (FMERSF = 1 in FLMSTR), resume erasure by setting the FMSPREQ bit to
0.