Datasheet

Section 7 ROM
REJ09B0465-0300 Rev. 3.00 Page 153 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
Section 7 ROM
The features of the on-chip flash memory are described below.
7.1 Overview
• Programming/erasing method
Four bytes are programmed simultaneously. A single block is erased at a time; only one block
should be erased at a time even when the entire ROM area is to be erased.
• Programming/erasing time
Programmable ROM programming time: 150 μs (typ.) for 4-byte simultaneous programming,
i.e., 38 μs (typ.) per byte
Data flash programming time: 300 μs (typ.) for 4-byte simultaneous programming, i.e., 75 μs
(typ.) per byte
Erasing time: 200 ms (typ.) per block for the programmable ROM and data flash areas.
• Reprogramming capability: The programmable ROM area can be reprogrammed up to 1000
times and the data flash area can be reprogrammed up to 10000 times.
• Two on-board programming modes
Boot mode: The on-chip SCI can be used for programming/erasing the user ROM area. In this
mode, the communication bit rate between the host and this LSI can be automatically adjusted.
User mode: Any interface can be used for programming/erasing the user ROM area.
• Programmer mode
A PROM programmer is used for programming/erasing.
• Protection function
Flash memory can be protected against erroneous programming and erasure.
Lock-bit protection function can be set through software.
• PROM-programmer protection/Boot-mode protection
By writing specified data to a specified address range in user ROM, protection of the user-
ROM area in boot mode and PROM-programmer mode can be established.
• Access cycle
Programmable ROM: One state
Data flash: Two states