Datasheet

Section 6 Power-Down Modes
REJ09B0465-0300 Rev. 3.00 Page 141 of 982
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
Section 6 Power-Down Modes
In addition to normal active mode, this LSI can enter either of the two power-down modes after
release from a reset, in which power consumption is reduced. As other measures for reduced
power consumption, this LSI also has a bus-master-clock division function for the low-speed-
operation of bus masters, module standby function which allows the selective stopping of on-chip
peripheral modules, and a PSC-divider stopping function. Further power consumption is possible
by selecting the low-speed on-chip oscillator clock φloco, or sub-oscillator clock φsub as the
source of the system clock φ to operate the LSI at a low speed. After release from a reset, all of the
peripheral functions except timer RE are in the module standby state. Make the settings for the
operation of module in the corresponding registers after the module standby state is released.
• Active Mode
The CPU and on-chip peripheral modules operate on the system clock φ. The system clock
frequency can be selected from among φbase to φbase/128, where φbase is the system
reference clock.
• Sleep Mode
The CPU is stopped. On-chip peripheral modules operate on the system clock φ.
• Standby Mode
The CPU and all the on-chip peripheral modules are stopped. However, timer RE can operate
when the realtime clock mode is selected. The watchdog timer (WDT) also operates when the
low-speed OCO or subclock φsub is selected as the WDT clock source.
• Bus Master Clock Division Function
For the bus masters CPU and DTC, ROM, and RAM, the operating clock φs can be divided
independently of the clock supplied to the peripheral modules. The bus master clock φs can be
selected from among φ to φ/32.
• PSC Divider Stop Function
The PSC divider can be stopped through software setting. Specifically, the peripheral modules
using φ/2 to φ/8192 are stopped (register values are retained), whereas the ones using φ remain
operating.
• Module Standby Function
Power consumption can be reduced by halting individual on-chip peripheral modules that are
not in use.