Datasheet

Page xi of xxvi
4.5 Interrupt Control Modes and Interrupt Operation................................................................ 98
4.5.1 Interrupt Control Mode 0........................................................................................ 98
4.5.2 Interrupt Control Mode 2...................................................................................... 100
4.5.3 Interrupt Exception Handling Sequence ............................................................... 102
4.5.4 Interrupt Response Time....................................................................................... 104
4.5.5 DTC Activation by Interrupt................................................................................. 104
4.6 Usage Notes ....................................................................................................................... 105
4.6.1 Conflict between Interrupt Generation and Disabling .......................................... 105
4.6.2 Instructions that Disable Interrupts....................................................................... 106
4.6.3 Time when Interrupts are Disabled....................................................................... 106
4.6.4 Interrupts during Execution of EEPMOV Instruction .......................................... 106
4.6.5 Changing PMR, ISCRH, ISCRL and INCCR....................................................... 107
4.6.6 IRQ Status Register (ISR)..................................................................................... 107
4.6.7 NMI Pin ................................................................................................................ 108
Section 5 Clock Pulse Generator .......................................................................109
5.1 Overview............................................................................................................................ 110
5.2 Register Descriptions......................................................................................................... 111
5.2.1 Backup Control Register (BAKCR) ..................................................................... 112
5.2.2 System Clock Control Register (SYSCCR).......................................................... 114
5.2.3 Power-Down Control Register 1 (LPCR1) ........................................................... 116
5.2.4 Power-Down Control Register 2 (LPCR2) ........................................................... 118
5.2.5 Power-Down Control Register 3 (LPCR3) ........................................................... 119
5.2.6 OSC Oscillation Settling Control Status Register (OSCCSR).............................. 121
5.3 Operation of Selection of System Reference Clock........................................................... 123
5.3.1 Switching System Reference Clock to φosc ......................................................... 126
5.3.2 Clock Change Timing........................................................................................... 128
5.3.3 Backup Operation ................................................................................................. 131
5.4 Main Clock Oscillator........................................................................................................ 135
5.4.1 Connecting Crystal Resonator .............................................................................. 135
5.4.2 Connecting Ceramic Resonator ............................................................................ 136
5.4.3 External Clock Input Method................................................................................ 136
5.5 Subclock Oscillator............................................................................................................ 137
5.5.1 Connecting 32.768-kHz Crystal Resonator .......................................................... 137
5.5.2 Pin Connection when not Using Subclock............................................................ 137
5.6 Prescaler............................................................................................................................. 138
5.7 Usage Notes ....................................................................................................................... 139
5.7.1 Note on Resonators............................................................................................... 139
5.7.2 Notes on Board Design......................................................................................... 139