Instruction manual

R8A66597 USB Evaluation Board R0K866597D020BR
Hardware Instruction Manual
R19AN0005EJ0100 Rev.1.00 Page 17 of 26
Jan 10, 2012
7. Jumper and Switch Setting
Table 7.1 Power supply / GND jumper setting
JP Name Factory Settings Function
JP1 Shorted by
pattern
Connecting between frame ground of CN5 and signal ground.
It is necessary to cut JP1’s pattern when dividing frame ground and
signal ground.
JP2 Shorted by
pattern
Jumper for measurement of 3.3V current.
It is necessary to cut JP2’s pattern when measuring 3.3 V current.
JP3 Shorted by wire Connecting between AGND and DGND
JP5 Shorted by
pattern
Connecting between frame ground of CN1 and signal ground.
It is necessary to cut JP5’s pattern when dividing frame ground and
signal ground.
Table 7.2 VIF jumper setting
JP Name Position
Factory
Settings
Function
EXIOVcc Power is supplied to VIF through TP29 JP6
(VBUS)
3.3V O VCC and VIF of R8A66597 are supplied from same source.
Table 7.3 USB mode jumper setting
JP Name Position
Factory
Settings
Function
HOST
CN1-1 (VBUS of USB A receptacle) is connected to VBUS
output of U2-5
OTG This position is for internal evaluation mode
JP6
(VBUS)
PERI O
CN1-1 (VBUS of USB A receptacle) is connected to VBUS pin
of R8A66597 and CN2-24.
Table 7.4 IRQ0 / IRQ2 jumper setting
JP Name Position
Factory
Settings
Function
IRQ 0 O Connect JA2-7 pin and INT_N pin on R8A66597 JP7
(INT SEL0)
IRQ 2 Connect JA2-23 pin and INT_N pin on R8A66597
Table 7.5 IRQ1 / IRQ3 jumper setting
JP Name Position
Factory
Settings
Function
IRQ 1 - Not used with this board JP11
(INT SEL1)
IRQ 3 - Not used with this board
Table 7.6 CS select jumper setting
JP Name Position
Factory
Settings
Function
CSa O Connect JA3-27 pin and CS_N pin on R8A66597
CSb Connect JA3-28 pin and CS_N pin on R8A66597
JP8
(CS SEL)
CSc
Connect JA3-45 pin and CS_N pin on R8A66597