Instruction manual

R8A66597 USB Evaluation Board R0K866597D020BR
Hardware Instruction Manual
R19AN0005EJ0100 Rev.1.00 Page 14 of 26
Jan 10, 2012
Address signal A22 O
43
SDRAM Bank 3 B3 O
NC
44 Clock output SDCLK O NC
Chip select CSc O
45
Wait Wait O
NC(CS_N) Default = NC
Can be connected with Jumper
Pin
Address line enable ALE O
46
SDRAM SDCLK Enable CKE O
NC
Higher-order byte
data write
HWRn O
47
SDRAM Data Mask
Enable
DQM1 O
WR1_N
Lower-order byte data
write
LWRn O
48
SDRAM Data Mask
Enable
DQM0 O
WR0_N
49 Column address select CAS O NC
50 Row address select RAS O NC