User manual

RSK+RX62N 6. Configuration
REJ10J2198-0201 Rev. 2.01 Page 28 of 54
Nov 30, 2011
6.6 External Bus Configuration
Table 6-9 below details the function of option links related to configuring the MCU’s external bus.
Reference Link Fitted Configuration Link Removed Configuration Related Ref.
R32 Connects OEn pin (U2, pin 19) to
GROUND, bypassing J2.
Disconnects OEn pin (U2, pin 19)
from GROUND (still connectable
via J2).
J2
R33 Connects OEn pin (U3, pin 19) to
GROUND, bypassing J3.
Disconnects OEn pin (U3, pin 19)
from GROUND (still connectable
via J3).
J3
R34 Connects OEn pin (U4, pin 19) to
GROUND, bypassing J4.
Disconnects OEn pin (U4, pin 19)
from GROUND (still connectable
via J4).
J4
R88 Connects WRn_WR0n_SSLB1-A
(MCU, pin P10) to header JA3, pin 26
(via R232).
Disconnects WRn_WR0n
_SSLB1-A (MCU, pin P10) from
header JA3, pin 26 (via R232).
R89, R90,
R232
R89 Connects WRn_WR0n_SSLB1-A (MCU,
pin 10) to header JA3, pin 48 (via R238).
Disconnects WRn_WR0n
_SSLB1-A (MCU, pin 10) from
header JA3, pin 48 (via R238).
R88, R90,
R238
R90 Connects WRn_WR0n_SSLB1-A
(MCU, pin 10) to header TFT, pin 32
(via R251).
Disconnects WRn_WR0n
_SSLB1-A (MCU, pin 10) from header
TFT, pin 32 (via R251).
R88, R89,
R251
R91 Connects EDACK0-C
_ETLINKSTA_MTIOC4B-B (MCU, pin
M7) to the Ethernet transceiver U15, pin
10.
Disconnects EDACK0-C
_ETLINKSTA_MTIOC4B-B (MCU,
pin M7) from the Ethernet
transceiver U15, pin 10.
R92, R93
R92 Connects EDACK0-C
_ETLINKSTA_MTIOC4B-B (MCU, pin
M7) to header JA2, pin 17.
Disconnects EDACK0-C
_ETLINKSTA_MTIOC4B-B (MCU,
pin M7) from header JA2, pin 17.
R91, R93
R93 Connects EDACK0-C
_ETLINKSTA_MTIOC4B-B (MCU, pin
M7) to headers JA6, pin 2; and TFT ,
pin 23.
Disconnects EDACK0-C
_ETLINKSTA_MTIOC4B-B (MCU, pin
M7) from headers JA6, pin 2; and
TFT , pin 23.
R91, R93
R94 Connects EDREQ0-C
_MTIOC4D-B (MCU, pin M6) to header
JA2, pin 18.
Disconnects EDREQ0-C
_MTIOC4D-B (MCU, pin M6) from
header JA2, pin 18.
R95
R95 Connects EDREQ0-C
_MTIOC4D-B (MCU, pin M6) to headers
JA6, pin 1; and TFT, pin 28.
Disconnects EDREQ0-C
_MTIOC4D-B (MCU, pin M6) from
headers JA6, pin 1; and TFT, pin
28.
R94
R96 Connects SDCSn (MCU, pin A13) to
the SDRAM module U5, pin 19 (chip
select signal).
Disconnects SDCSn (MCU, pin A13)
from the SDRAM module U5, pin 19
(chip select signal).
R97
R97 Connects SDCSn (MCU, pin A13) to
header JA3, pin 28.
Disconnects SDCSn (MCU, pin
A13) from header JA3, pin 28.
R96
R106 Connects A0_MTIOC6A (MCU, pin
F14) to the external address bus.
Disconnects A0_MTIOC6A (MCU, pin
F14) from the external address bus.
R107
R107 Connects A0_MTIOC6A (MCU, pin F14)
to header JA1, pin 23 (via R225).
Disconnects A0_MTIOC6A (MCU,
pin F14) from header JA1, pin 23
(via R225).
R106, R225
R108 Connects A1_MTIOC6B (MCU, pin
G15) to the external address bus.
Disconnects A1_MTIOC6B (MCU, pin
G15) from the external address bus.
R109
Table 6-9: External Bus Option Links (Continued Overleaf)