User`s manual

82
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37281MAHXXXSP,M37281MFHXXXSP
M37281MKHXXXSP,M37281EKSP
MITSUBISHI MICROCOMPUTERS
Rev. 1.0
Fig. 8.11.19 Relation Between Field Determination Flag and Display Font
Both H
SYNC
signal and V
SYNC
signal are negative-polarity input
Field
Even
Odd
Field
determination
flag(Note)
Display dot line
selection bit
Display dot line
0 (T2 > T1)
1 (T3 < T2)
0
1
0
1
When using the field determination flag, be sure to set bit 0 of the PWM mode register 1 (address 020A
16
) to 0.
T2
T3
OSD ROM font configuration diagram
Dot line 0
Dot line 1
Odd
Dot line 0
Dot line 1
(n1) field
(Odd-numbered)
T1
0.25 to 0.50[µs] at
f(X
IN) =8 MHz
CC mode · CDOSD mode
1 35 79111315
1
3
5
7
9
11
13
15
17
19
21
23
25
26
24
22
20
18
16
14
12
10
8
6
4
2
24 6810121416
1
3
5
7
9
11
13
15
17
19
20
18
16
14
12
10
8
6
4
2
135791113152 4 6 8 10 12 14 16
OSDS mode
H
SYNC
V
SYNC
and
V
SYNC
control
signal
in microcom-
puter
Upper :
V
SYNC
signal
Lower :
V
SYNC
control
signal in
micro-
computer
(n) field
(Even-numbered)
(n+1) field
(Odd-numbered)
When the display dot line selection bit is 0,
the font is displayed at even field, the
font is displayed at odd field. Bit 7 of the
I/O polarity control register can be read as the
field determination flag : 1 is read at odd field,
0 is read at even field.
Note : The field determination flag changes at a rising edge of the V
SYNC
control signal (negative-polarity input) in
the microcomputer.